(errno = ENOENT) # ** Error: (vsim-19) Failed to access library 'altera_lnsim_ver' at "altera_lnsim_ver". (errno = ENOENT) # ** Error: (vsim-19) Failed to access library 'sgate_ver' at "sgate_ver". (errno = ENOENT) # ** Error: (vsim-19) Failed to access library '220model_ver' at "220model_ver". (errno = ENOENT) # ** Error: (vsim-19) Failed to access library 'altera_mf_ver' at "altera_mf_ver". (errno = ENOENT) # ** Error: (vsim-19) Failed to access library 'altera_ver' at "altera_ver". # Model Technology ModelSim ALTERA vlog 10.1e Compiler 2013.06 # - Compiling module rs_latch # Top level modules: # rs_latch # Model Technology ModelSim ALTERA vlog 10.1e Compiler 2013.06 # - Compiling module rs_latch_vlg_sample_tst # - Compiling module rs_latch_vlg_check_tst # - Compiling module rs_latch_vlg_vec_tst # Top level modules: # rs_latch_vlg_vec_tst # vsim -L cyclonev_ver -L altera_ver -L altera_mf_ver -L 220model_ver -L sgate_ver -L altera_lnsim_ver -c -voptargs=\"+acc\" -t 1ps -novopt work.rs_latch_vlg_vec_tst # Loading work.rs_latch_vlg_vec_tst # ** Error: (vsim-19) Failed to access library 'cyclonev_ver' at "cyclonev_ver". **** Running the ModelSim simulation **** C:/altera/14.0/modelsim_ase/win32aloem/vsim -c -do rs_latch.do Reading C:/altera/14.0/modelsim_ase/tcl/vsim/pref.tcl # 10.1e # do rs_latch.do # ** Warning: (vlib-34) Library already exists at "work". do script **** D:/FPGA/Lab03/Part1_RSLatch/simulation/qsim/rs_latch.do generated. Using: C:\altera\14.0\modelsim_ase\win32aloem To specify a ModelSim executable directory, select: Tools -> Options -> EDA Tool Options Note: if both ModelSim-Altera and ModelSim executables are available, ModelSim-Altera will be used. (only list part of error message because of the characters number limitation in this forum.) - Determining the location of the ModelSim executable.
Error loading design modelsim series#
And when I use "Run Functional Simulation" or "Run Timing Simulation", it would start to run a series processes, and I would get a error message as follows. module rs_latch (Clk, R, S, Q) input Clk, R, S output Q wire R_g, S_g, Qa, Qb and(R_g, R, Clk) and(S_g, S, Clk) nor(Qa, R_g, Qb) nor(Qb, S_g, Qa) assign Q = Qa endmodule - The input setup of RS latch simulation in simulation waveform editor is as attachment. The logfile contains the following messages: /usr/bin/ld: skipping incompatible /usr/lib/gcc/x86_64-linux-gnu/4.9/libgcc.a when searching for -lgcc /usr/bin/ld: cannot find -lgcc /usr/bin/ld: skipping incompatible /usr/lib/gcc/x86_64-linux-gnu/4.9/libgcc_s.so when searching for -lgcc_s /usr/bin/ld: cannot find -lgcc_s collect2: error: ld returned 1 exit status No such file or directory.Hello I am using simulation waveform editor (Altera Quartus II 64-Bit 14.0 Web Edition) to simulate a simple RS latch with verilog as follows.
Error loading design modelsim code#
I"/root/pulpino/altera/16.0/modelsim_ase/include" -I"/root/pulpino/altera/16.0/modelsim_ase/./oem/include" -o >'/tmp/questatmp.P942uc' 2>&1) returned error code '1'. I"/root/pulpino/altera/16.0/modelsim_ase/include" -I"/root/pulpino/altera/16.0/modelsim_ase/./oem/include" -o (vsim-50) A call to system(/usr/bin/gcc -shared -fPIC -m32 -g -I. ** Fatal: ** Error: (vsim-3827) Could not compile 'export_tramp.so': cmd = '/usr/bin/gcc -shared -fPIC -m32 -g -I. Source tcl_files/run.tcl vsim -quiet tb -L pulpino_lib -L axi_node_lib -L apb_node_lib -L axi_mem_if_DP_lib -L axi_spi_slave_lib -L axi_spi_master_lib -L apb_uart_sv_lib -L apb_gpio_lib -L apb_event_unit_lib -L apb_spi_master_lib -L fpu_lib -L apb_pulpino_lib -L apb_fll_if_lib -L core2axi_lib -L apb_timer_lib -L axi2apb_lib -L apb_i2c_lib -L zero_riscy_lib -L axi_slice_dc_lib -L riscv_lib -L apb_uart_lib -L axi_slice_lib -L adv_dbg_if_lib -L apb2per_lib "+nowarnTRAN" "+nowarnTSCALE" "+nowarnTFMPC" "+MEMLOAD=PRELOAD" -t ps -voptargs="+acc -suppress 2103" -dpicpppath /usr/bin/gcc -GTEST="" -gRISCY_RV32F=0 -gZERO_RV32E=0 -gZERO_RV32M=0 -gUSE_ZERO_RISCY=0 Start time: 14:04:31 on Sep 14,2021 ** Warning: (vsim-7032) The 32-bit glibc RPM does not appear to be installed on this machine.